This invention relates to an improved differential amplifier wherein the input terminal voltage of the differential amplifier is maintained at substantially zero potential regardless of the variations of power source voltages when no input signal is received.
Conventionally, a differential amplifier comprising a pair of transistors has been proposed, in which a signal input terminal is derived from the base of the first amplifier transistor. A compensation transistor is coupled to the base of the first amplifier transistor for absorbing the base current of the first amplifier transistor. This type of differential amplifier is indicated at page 73 of "OPERATIONAL AMPLIFIERS Design And Applications" published by McGRAW-HILL KOGADUSHA, LTD. In such a differential amplifier, a resistor is connected to the emitter of the compensation transistor and the amount of current absorbed from the base of the first amplifier transistor is controlled by adjusting the resistance of the resistor associated with the compensation transistor. Accordingly, in the case where the voltages in positive and negative power sources are independently varied, the collector current of the compensation transistor and the collector currents of the amplifier transistors are individually varied. These variations individually vary the base currents of the compensation transistor and the first amplifier transistor, with the result that the input terminal voltage of the differential amplifier fluctuates from the zero voltage level and thus the applied input signal is to be superimposed on the input terminal voltage being varied. Consequently, the compensation transistor does not operate to completely absorb the base current of the first transistor when the power source voltages are varied.